Trademark: Flexible Fan Out Wafer Processing And Structure: Flextrate

Tech ID: 27451 / UC Case 2017-212-0


UCLA researchers in the Department of Electrical Engineering have invented a novel biocompatible flexible device fabrication method using fan-out wafer level processing (FOWLP).


Conventional device and substrate technologies require the use of rigid substrates, and it is common for microbumps to form on the chips. Flexible device methods also have serious limitations. For instance, FOWLP technologies have severe wafer bow due to the high-stress epoxies that are used as a mold resin. Also roll-to-roll technologies result in deformation in the large-area sheet-level processing, which is crucial for high performance devices and the formation of fine devices and wirings.


Researchers led by Professor Subramanian Iyer have developed a novel method to fabricate flexible electronics using FOWLP. Unlike conventional technologies, which use large chips with rigid substrates, this technology utilizes small dielets on flexible substrate in order to provide flexibility. Not only can this invention be processed at a wafer-level, but various device dielets with different thicknesses can be integrated and biocompatible resins, such as PDMS, can be used, thus providing heterogeneous integration. These innovative biocompatible flexible devices will have numerous applications, such as wearable sensors and implantable electrodes.


  • Biocompatible flexible electronics
  • Wearable sensors
  • Implantable electrodes


  • Wafer-level batch processing via FOWLP
  • Different thicknesses of dielets can be used
  • Heterogeneous integration
  • Biocompatible Flexible and Stretchable

State Of Development

Prototype flexible devices have been fabricated using FOWLP and have been thoroughly tested.

Patent Status

Country Type Number Dated Case
United States Of America Issued Patent 10,930,601 02/23/2021 2017-212


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  • Iyer, Subramanian

Other Information


Flexible devices, biocompatible flexible devices, biocompatible, dielets, wafer-level processing, fan-out wafer level processing, FOWLP, wearable sensors, implantable electrodes, high density interconnects, heterogeneous integration

Categorized As