Modern mobile applications strive for the complete integration of all communication systems in CMOS. Unfortunately, it is conventionally difficult to efficiently generate high levels of RF power in scaled CMOS largely due to the inherently low voltage ratings of core transistors. To realize high output power with ~1V transistors, power combining techniques have been proposed whereby the output of several low-voltage power amplifier (PA) cells are combined via inductive transformers. However, power combining relies on ultra-thick metal that still carries large ohmic and substrate losses. These AC-AC losses, combined with the DC-AC losses of the PAs themselves, and the DC-DC losses of the battery-connected power converters, result in limited total transmitter efficiencies. Even modern digital PA techniques such as RF-DACs, digital Doherty, and digital out-phasing, which have been proposed to leverage the excellent switch performance of scaled transistors and offer reconfigurable operation, still require battery-connected DC-DC converters and RF transformers/power combiners, both of which result in cascaded losses.