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Chromium Complexes Of Graphene

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(SD2018-032) Intrinsically Linear Transistor for Millimeter-Wave Low Noise Amplifiers

There has been a steady rise in interest in utilizing Fin high-electron mobility transistors HEMT devices to reduce the source access resistance and enhance the linearity but this linearity is not accessible at gate voltages beyond those at which the gate Schottky diode turns on (~2 V). All known transistor technologies are intrinsically non-linear. This non-linearity leads to signal distortion and power loss. Non-linearity is embodied in a decrease of the transistor current gain cut-off frequency, fT, and maximum oscillation frequency, fmax, with an increase in the drain current.  In contrast, the patented technology here is one of a new Fin MOS-HEMT device permits flexible engineering of the device threshold voltage in order to attain linearity over a wider VGS range (voltage between transistor gate and source (VGS) in excess of the threshold voltage (Vt) where Vt is defined as the minimum).

Superlattice, Ferroic Order Thin Films For Use As High/Negative-K Dielectric

With the two-dimensional scaling of silicon field-effect transistors reaching fundamental limits, new functional improvements to transistors, as well as novel computing paradigms and vertical device integration at the architecture-level, are currently under intense study. Gate oxides play a critical role in this endeavor, as it’s a common performance booster for all devices, including silicon, new channel materials with potential for higher performance, and even materials suitable for three-dimensional integrated transistors.With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage. To pursue these performance gains, UC Berkeley researchers invented a new heterostructure insulator material where: 1) the material possesses specific ferroic order such as ferroelectricity/anti-ferroelectricity or a mixture of both; 2) the overall dielectric property such as the permittivity is determined by the stacking order of different layers rather than exact volume fraction of the constituents; and 3) the material is composed of one or several repetition of ultra thin superlattice periods ranging from a few angstroms to 3 nm.

New Technique to Reduce Register File Accesses in GPUs

Prof. Nael Ghazaleh and Hodjat Asghari Esfeden from the University of California, Riverside have developed Breathing Operand Windows (BOW), an enhanced GPU pipeline and operand collector technique that supports bypassing register file accesses and instead passes values directly between instructions within the same window. While this baseline design can only bypass register reads, they also introduce an improved design capable of bypassing unnecessary write operations to the RF. Compiler optimizations help guide the write-back destination of operands depending on whether they will be reused to further reduce the write traffic. The BOW microarchitecture reduces RF dynamic energy consumption by 55%, while at the same time increases overall performance by 11%, with a modest overhead of 12KB of additional storage which is ~4% of the RF size. Fig 1: shows the dynamic energy normalized to the baseline GPU for BOW-WR across fifteen different benchmarks. The small segments on top of each bar represent the overheads of the structures added by the idea. Dynamic energy savings in Fig 1 are due to the reduced number of accesses to the register file as BOW-WR shields the RF from unnecessary read and write operations.  

Development of a CMOS-Compatible, Nano-photonic, Laser

Researchers at the University of California, Davis have developed a new class of lasers and amplifiers that uses a CMOS-compatible electronics platform - and can also be applied to nano-amplifiers and nano-lasers applications.

New Spin Current-Based Memory Devices and Switches

Prof. Jing Shi and his colleagues from the University of California, Riverside have developed two new applications to utilize spin current in electronic devices. The first is a pure spin current switch that allows for the manipulation of pure spin current in electronic devices by allowing the user to switch between an “on” and “off” state. The device includes a first metal layer, a magnetic insulator layer, and a second metal layer. This technology controls the flow of information by switching the direction of magnetization of the middle layer. Since spin current does not require electricity, the spin current switch holds an innovative promise for the future of the way electronic devices channel current. The second is a non-volatile random access memory (RAM) device capable of using spin current to reduce electricity consumption. The technology can transmit information through electrical insulators, where the flow of information can be switched “off” by applying a magnetic field. The “on” and “off” states are two non-volatile memory states that can be stored as the magnetization direction of the magnetic insulator layer. This technology holds promise for a new generation of RAM technology that is not limited by memory bottleneck.  Fig. 1: A schematic illustration of a spin current valve. Top: The switch in the "on" position. Bottom: The switch in the "off" position.  

Scalable Manufacturing of Copper Nanocomposites with Tunable Properties

UCLA researchers in the Department of Mechanical and Aerospace Engineering have developed a cost-effective method to produce copper-based nanocomposites with excellent mechanical, electrical and thermal properties.

Flexible Microfluidic Sensors for Curved Surfaces

UCLA researchers in the Department of Mechanical and Aerospace Engineering have developed flexible tactile sensors for curved surfaces that are robust against fatigue and suitable for robotic applications.

Low Energy and Noise Sub-Sampling Phase-Locked Loop

Phase locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency, or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Researchers at the University of California, Davis have invented a novel, sub-sampling phase-locked, loop (SSPLL) that uses a sub-sampling lock detector (SSLD) to monitor the harmonic selected by the SSPLL. This technology requires lower energy consumption and reduces signal noise.

Diamond On Nanopatterned Substrates

UCLA researchers in the Department of Materials Science and Engineering have developed a nanofabrication method for improving the thermal properties of polycrystalline diamond films grown by chemical vapor deposition.

Techniques for Creation and Insertion of Test Points for Malicious Circuitry Detection

Researchers led by Dr. Potkonjak from the UCLA Department of Computer Science have developed a technique to detect hardware Trojans in integrated circuits.

Magnetoelectric Device with Two Dielectric Barriers

UCLA researchers in the Department of Electrical and Computer Engineering have developed a magnetoelectric memory device that uses two dielectric barriers for improved voltage-controlled magnetic anisotropy (VCMA) and tunnel magnetoresistance (TMR) properties.

Selective Deposition Of Diamond In Thermal Vias

UCLA researchers in the Department of Materials Science & Engineering have developed a new method of diamond deposition in integrated circuit vias for thermal dissipation.

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