Network On Interconnect Fabric

Tech ID: 29596 / UC Case 2018-220-0


Researchers at the UCLA Department of Electrical & Computer Engineering have developed a novel network on interconnect fabric (NoIF) to support global communication, power conversion and management, synchronization, and to facilitate testing within the silicon interconnect fabric (Si-IF).


Modern systems contain a variety of heterogeneous circuit blocks, and require ultra large-scale integration to accommodate different applications. Ideally, silicon interconnect fabric (Si-IF) is a compatible platform to satisfy the needs of modern systems through supporting integration of bare (unpackaged) dies using thermal compression bonding on a Si wafer substrate. Fine pitch horizontal and vertical interconnects are feasible within the Si-IF using standard Si processing techniques. However, to enable the Si-IF as a practical platform for ultra large-scale heterogeneous integration, system-level issues, similar to a large system on a chip, must be addressed.


Researchers at UCLA have developed a novel network on interconnect fabric (NoIF), which enables integration of ultra large-scale heterogeneous systems within the technologically mature Si-IF platforms. NoIF is based on utility dies that serve as intelligent nodes within the network.


NoIF offers a wafer-level framework to enable multiple services, including global and semi-global communication, power delivery, conversion, and management, synchronization, testing and more.


NoIF is a novel wafer-level framework to support heterogeneous, ultra large-scale integration.

State Of Development

Conceptual stage.

Patent Status

Country Type Number Dated Case
United States Of America Published Application 20200403293 12/24/2020 2018-220

Related Materials


Learn About UC TechAlerts - Save Searches and receive new technology matches


  • Iyer, Subramanian

Other Information


Silicon interconnect fabric, Si-IF, heterogeneous integration, performance scaling

Categorized As