Bonding of Heterogeneous Material for Improved Yield and Performance of Photonic Integrated Circuits

Tech ID: 30044 / UC Case 2014-312-0

Brief Description

A new approach to photonic integrated circuit fabrication.


Cost is a fundamental design criterion for data centers looking for a technological solution for the transition between centers dominated by high speed copper connections and those with optical connections. Silicon photonics fabrication technology is reaching the point where it can offer superior performance and similar lifecycle costs to current technologies. One challenge to silicon photonic fabrication is the mismatch that occurs when III-V materials are grown on native III-V substrates then transferred to silicon substrates using the wafer bonding process. This mismatch can result is increased defects and degradation of material quality and device efficiency.


Researchers at the University of California, Santa Barbara have developed a new method of photonic integrated circuit fabrication where quantum dot III-V material and silicon waveguides are both grown on silicon substrates and are bonded using the wafer bonding process. Using identical substrates overcomes many of the limitations associated with substrate dissimilarity and also enables further processing of the III-V material before and/or after the wafer bonding. The process also shows potential for scalable, high-yield production of photonic integrated circuits.


  • Improved integrity of device
  • Scalable wafer size
  • No CTE mismatch of substrates


  •  Optoelectronic devices
  •  Semiconductor lasers

Patent Status

Country Type Number Dated Case
United States Of America Issued Patent 9,360,623 06/07/2016 2014-312


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Other Information


indadvmat, photonic integrated circuit, advanced materials, silicon photonics fabrication, quantum dot III-V, silicon waveguides, wafer bonding process

Categorized As