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Livesynthesis: Towards An Interactive Synthesis Flow

In digital circuit design, synthesis is a tedious and time consuming task. Designers wait several hours for relatively small design changes to yield synthesis results. 


Electronic circuits are growing in complexity every year. Existing workflows that optimize the design and placement of circuit components are laborious and time-consuming though. Incremental design changes that target device optimization can take many hours to render. Streamlined design workflows that are both fast and able to optimize performance are needed to keep pace with these device improvements. A UC Santa Cruz researcher has developed a new technique, SMatch, to shorten design workflow times with minimal QoR impact. 

Chromium Complexes Of Graphene

Brief description not available

Corf: Coalescing Operand Register File For Graphical Processing Units

Modern Graphical Processing Units (GPUs) consist of several Streaming Multiprocessors (SM) – each has its own Register File (RF) and a number of integers, floating points and specialized computational cores. GPU program is decomposed into one or more cooperative thread arrays that are scheduled to the SMs. GPUs invest in large RFs to enable fine-grained and fast switching between executing groups of threads. This results in RFs being the most power hungry components of the GPU. The RF organization substantially affects the overall performance and energy efficiency of the GPU.

Light-Driven Ultrafast Electric Gating

The inventors have discovered a new way to generate ultrafast back-gating, by leveraging the surface band bending inherent to many semiconductor materials. This new architecture consists of a standard bulk semiconductor material and a layered material on the surface. Optical pulses generate picosecond time-varying electric fields on the surface material. The inventors have successfully applied this method to a quantum well Rashba system, as this is considered today one of the most promising candidates for spin-based devices, such as the Datta Das spin-transistor. The technology can induce an ultrafast gate and drive time-dependent Rashba and quantum well dynamics never observed before, with switching faster than 10GHz. This approach minimizes lithography and will enable light-driven electronic and spintronics devices such as transistors, spin-transistors, and photo-controlled Rashba circuitry. This method can be applied with minimal effort to any two-dimensional material, for both exfoliated and molecular beam epitaxy grown samples. Electric field gating is one of the most fundamental tuning knobs for all modern solid-state technology, and is the foundation for many solid-state devices such as transistors. Current methods for in-situ back-gated devices are difficult to fabricate, introduce unwanted contaminants, and are unsuited for picosecond time-resolved electric field studies.  

Compressive High-Speed Optical Transceiver

Researchers at the University of California, Davis have developed an optical transceiver that uses compressive sensing to reduce bandwidth requirements and improve signal resolution.

Low-Cost, Multi-Wavelength, Camera System that Incorporates Artificial Intelligence for Precision Positioning

Researchers at the University of California, Davis have developed a system consisting of cameras and multi-wavelength lasers that is capable of precisely locating and inspecting items.

In-Sensor Hardware-Software Co-Design Methodology of the Hall Effect Sensors to Prevent and Contain the EMI Spoofing Attacks

Researchers at UCI have developed a novel co-design methodology of hardware-software architecture used for protecting Hall sensors found in autonomous vehicles, smart grids, industrial plants, etc…, against spoofing attacks.There are currently no comprehensive measures in place to protecting Hall sensors.

Integrated Virtual Reality and Audiovisual Display Support System for Patients in a Prone Position

Researchers at the University of California, Davis have developed an integrated virtual reality and audiovisual support system that increases the comfort of patients who are undergoing diagnostic tests or medical procedures in the prone and other positions.

Reducing Electrical Current Variations in Phase-Locked Loop Systems

Researchers at the University of California, Davis have developed a method of eliminating electrical current mismatches in the charge pumps of phase-locked loops (PLL) systems - thereby increasing their power efficiency and phase detection capabilities.

Superlattice, Ferroic Order Thin Films For Use As High/Negative-K Dielectric

With the two-dimensional scaling of silicon field-effect transistors reaching fundamental limits, new functional improvements to transistors, as well as novel computing paradigms and vertical device integration at the architecture-level, are currently under intense study. Gate oxides play a critical role in this endeavor, as it’s a common performance booster for all devices, including silicon, new channel materials with potential for higher performance, and even materials suitable for three-dimensional integrated transistors.With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage. To pursue these performance gains, UC Berkeley researchers invented a new heterostructure insulator material where: 1) the material possesses specific ferroic order such as ferroelectricity/anti-ferroelectricity or a mixture of both; 2) the overall dielectric property such as the permittivity is determined by the stacking order of different layers rather than exact volume fraction of the constituents; and 3) the material is composed of one or several repetition of ultra thin superlattice periods ranging from a few angstroms to 3 nm.

Precision Graphene Nanoribbon Wires for Molecular Electronics Sensing and Switch

The inventors have developed a highly scalable multiplexed approach to increase the density of graphene nanoribbon- (GNR) based transistors. The technology forms a single device/chip (scale to 16,000 to >1,000,000 parallel transistors) on a single integrated circuit for single molecule biomolecular sensing, electrical switching, magnetic switching, and logic operations. This work relates to the synthesis and the manufacture of molecular electronic devices, more particularly sensors, switches, and complimentary metal-oxide semiconductor (CMOS) chip-based integrated circuits.Bottom-up synthesized graphene nanoribbons (GNRs) have emerged as one of the most promising materials for post-silicon integrated circuit architectures and have already demonstrated the ability to overcome many of the challenges encountered by devices based on carbon nanotubes or photolithographically patterned graphene. The new field of synthetic electronics borne out of GNRs electronic devices could enable the next generation of electronic circuits and sensors.  

Smart Suction Cup for Adaptive Gripping and Haptic Exploration

Vacuum grippers are widely used in industry to handle objects via suction pressure. Unicontact suction cups are commonly used for gripping because they are simple to operate and can handle a variety of items, including those that are delicate, large, or inaccessible to jaw grippers. However, suction cup grippers have challenges such as planning a contact location and inertial force-induced grasping failure. To address these challenges, UC Berkeley researchers developed a tactile sensing technology for smart suction cups. This Berkeley sensing technology can detect suction contact and prevent suction cup grasp failures. It can perform tactile sensing of object properties such as roughness or porosity that might lead to grasping failures before they happen. If a grasp failure does happen, the technology gains additional information about why and how the failure occurred to prevent similar failures in future attempts. Sensing occurs quickly, such that robot behavior can remain fast while increasing performance, efficiency and reliability.  As compared with other robotic grasping sensing technologies, this smart suction cup technology is affordable, resilient and easy to service. The cup is manufactured using the same process as other suction cups, and electronics are simple and located away from the point-of-contact and protected from damage or hazardous exposure.

Phased-Locked Loop Coupled Array for Phased Array Applications

Researchers at the University of California, Davis have developed a phased-locked loop coupled array system capable of generating phase shifts in phased array antenna systems - while minimizing signal losses.

(SD2019-340) Collaborative High-Dimensional Computing

Internet of Things ( IoT ) applications often analyze collected data using machine learning algorithms. As the amount of the data keeps increasing, many applications send the data to powerful systems, e.g., data centers, to run the learning algorithms . On the one hand, sending the original data is not desirable due to privacy and security concerns.On the other hand, many machine learning models may require unencrypted ( plaintext ) data, e.g., original images , to train models and perform inference . When offloading theses computation tasks, sensitive information may be exposed to the untrustworthy cloud system which is susceptible to internal and external attacks . In many IoT systems , the learning procedure should be performed with the data that is held by a large number of user devices at the edge of Internet . These users may be unwilling to share the original data with the cloud and other users if security concerns cannot be addressed.

Embedded Power Amplifier

Researchers at the University of California, Davis have developed an amplifier technology that boosts power output in order to improve data transmission speeds for high-frequency communications.

(SD2020-367) Bit-Parallel Vector Composability For Neural Acceleration

Conventional neural accelerators rely on isolated self‐sufficient functional units that perform an atomic operation while communicating the results through an operand delivery‐aggregation logic. Each single unit processes all the bits of their operands atomically and produce all the bits of the results in isolation.  

(SD2019-275) Mixed-Signal Acceleration Of Deep Neural Networks

Deep Neural Networks (DNNs) are revolutionizing a wide range of services and applications such as language translation , transportation , intelligent search, e-commerce, and medical diagnosis. These benefits are predicated upon delivery on performance and energy efficiency from hardware platforms. With the diminishing benefits from general-purpose processors, there is an explosion of digital accelerators for DNNs. Mixed-signal acceleration is also gaining traction. Albeit low-power, mixed signal circuitry suffers from limited range of information encoding, is susceptible to noise, imposes Analog to Digital (A/D) and Digital to Analog (D/A) conversion overheads, and lacks fine-grained control mechanism. Realizing the full potential of mixed-signal technology requires a balanced design that brings mathematics, architecture, and circuits together.

Contextual Augmentation Using Scene Graphs

Spatial computing experiences are constrained by the real-world surroundings of the user.  In such experiences, augmenting virtual objects to existing scenes require a contextual approach, where geometrical conflicts are avoided, and functional and plausible relationships to other objects are maintained in the target environment.  Yet, due to the complexity and diversity of user environments, automatically calculating ideal positions of virtual content that is adaptive to the context of the scene is considered a challenging task.    UC researchers have developed a framework which augments scenes with virtual objects using an explicit generative model to learn topological relationship from priors extracted from a real-world and/or synthetic 3D datasets.  Primarily designed for spatial computing applications, SceneGen extracts features from rooms into a novel spatial representation which encapsulates positional and orientational relationships of a scene which captures pairwise topology between objects, object groups, and the room.  The AR application iteratively augments objects by sampling positions and orientations across a room to create a probabilistic heat map of where the object can be placed.  By placing objects in poses where the spatial relationships are likely, we are able to augment scenes that are realistic. 

A Fully Integrated Stretchable Sensor Arrays for Wearable Sign Language Translation To Voice

UCLA researchers in the Department of Bioengineering have developed a novel machine learning assisted wearable sensor system for the direct translation of sign language into voice with high performance.

A Battery-Less Wirelessly Powered Frequency-Swept Spectroscopy Sensor

UCLA researchers in the Department of Electrical and Computer Engineering have developed a wirelessly powered frequency-swept spectroscopy sensor.

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