Nanowires are drawing tremendous interest due to their unique properties like high surface to volume ratio and dimensionality. Advances in nanowire assembly techniques have enabled devices based on nanowires to be realized. Doping of silicon nanowires is required for the fabrication of electronic devices incorporating semiconducting nanowires. One problem with doping involves accurate alignment and positioning of the appropriately doped regions of the nanowires to build functional devices using currently known assembly techniques can be extremely cumbersome. Ion-implantation allows precise control of the amount of introduced dopants and the location of suitably doped portions of nanowires. However, ion implantation can damage the crystalline lattice of nanowires, which may require a high temperature annealing step to repair, and such high temperature processing can further damage the substrates, such as plastic substrates. To address these problems, researchers at UC Berkeley have developed methods for enabling the processing of nanowires on temperature sensitive substrates, without the damage to the nanowires and substrates that can result using conventional processing techniques.
|United States Of America||Issued Patent||7,786,024||08/31/2010||2007-085|