Incorporating Temperature-Sensitive Layers in III-N Devices

Tech ID: 31877 / UC Case 2019-939-0

Background

Typical III-N devices are limited by temperature sensitivity in the active region when growing p-GaN on top at higher temperatures. Due to concerns with unintentional Mg-doping incorporation and the necessary activation step post-growth, p-GaN is typically grown last in a device structure. Growing p-GaN at high temperatures disturbs regions in the device with poor stability at higher temperatures by causing active region degradation. The ability to grow potential devices is restricted by high temperature p-GaN growth.

Description

Researchers at the University of California, Santa Barbara have developed a III-V device that uses active regions with low temperature stability, such as InN or high indium content InGaN quantum dots or wells. This technology addresses growth concerns associated with p-type GaN by growing p-GaN first, and mitigating impurity incorporation into p-GaN:Mg by depositing the p-GaN prior to the growth of the active region. This technology also leverages the capabilities of the N-polar face, which is the slowest-grown plane in MOCVD. Devices that were previously impossible to grow, due to the high temperature p-GaN growth and capping of InN quantum dots, can be enabled via the slow growth of the N-polar direction – an essential benefit for longer wavelength III-V devices, including infrared

Advantages

  • Increases device growth potential
  • Reduces p-GaN growth temperature
  • Long wavelength applications

Applications

  • LEDs
  • Laser Diodes

Patent Status

Patent Pending

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Other Information

Keywords

temperature sensitive, III-Nitride, quantum dot

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