Researchers at the University of California, Davis have developed a method of fabricating a III-nitride vertical transistor with aperture region formed using ion implantation as a path to achieve selective area doping.
Silicon (Si) based transistors have been used for the power conversion between watt and megawatt electronics. With the increasing kilowatt level power conversion demands of modern electronics, wide bandgap materials (WBG) are becoming more popular. Gallium nitride (GaN) is a material of choice for high-power (>10 kW) electronics because of its high-power conversion efficiency, reduced form factor, negligible switch loss, and high-frequency operation. Vertical GaN transistors, which are not subject to large chip areas and >20 A current levels for breakdown voltages of their lateral counterparts, are fabricated by regrowth (by either metal-organic chemical vapor deposition (MOCVD) or doping/implantation of Mg/Al using an aperture region mask) of an implanted or regrown current blocking layer (CBL). Although these methods have enabled functioning devices, they are unable to hold high off-stage voltages (>600 V). To overcome this limitation, there is a need for a system and method for producing III-nitride vertical transistors without a regrowth step.
Researchers at the University of California, Davis have developed a method of fabricating a GaN lateral semiconductor device consisting of a p-type GaN CBL and multiple aperture regions that enable current flow without a regrowth step. This new method uses a CBL formed by doping as part of the base structure and aperture regions realized by ion implantation. The semiconductor structures, devices, and III-nitride vertical transistors can be applied to current aperture vertical electron transistors (CAVETs), lateral channel vertical junction field-effect transistors (LC-VJFETs) and vertical metal-oxide-semiconductor field-effect transistors (VMOSFETs). The semiconductor device prevents electron flow from source to drain without gate modulation. The ion implantation process provides well-defined impurity concentration in selected regions and multiple energies are used to form a box.
|Patent Cooperation Treaty||Reference for National Filings||2017197179A1||11/16/2017||2016-829|
silicon, si, GaN, gallium nitride, III-nitride, semiconductor, high power conversion, vertical, transistor