This technology features new serial bus interface module for constrained sensor systems.It features better matches flashed-based storage devices read and write performance and augments existing flash-based storage with non-volatile RAM.Additionally, user can enable slave to slave transfer and read caching and buffering while flushing with faster speed and lower energy overhead.
The present invention is a new serial bus interface module that allows constrained sensor systems to better match flash-based storage device's (SD card) read and write performance. It augments existing flash-based storage with non-volatile random-access memory to form a hybrid storage system using the most popularly used master-slave bus architecture. Together with PSC-like features, the serial bus interface module not only enables slave-to-slave transfer (therefore eliminating the double-transaction problem) but also read caching (one source to multi-sink) and buffering while flushing. These transaction types enable the multi-sector write for significantly faster speed and lower energy overhead, while the use of non-volatile memory for metadata caching means low risk of file-system corruption in the event of power failure. The proposed serial bus interface also enables the direct data transfer from sensors to storage or communication modules without requiring the microprocessor’s intervention.
Flashed based storage devices are popularly used for long-term data logging since they are cost effective, high capacity and low power. However, most data loggers for low-power sensing systems achieve nowhere near their rated I/O bandwidth and spend far too much energy to write data. This bottleneck is due to a combination of master-slave bus architecture and scheduling.
One major issue with currently used storage compositions is that their logging performance is far behind the rated storage provided by SD cards. This occurs because the embedded MCUs cannot afford allocating enough memory to enable the multiple-page-write required to match the rated bandwidth. The master-slave bus architecture also presents a double transaction problem, because two transactions are needed to send data between two slave devices. So, the maximum transfer rate between two slave devices is half of what the channel is physically capable of handling. Energy consumption is also an issue as sensor systems are deployed in remote places with inconsistent power sources and limited wireless transmission.
UCI researchers have developed a module that addresses these limitations, cutting transaction time on the I/O bus in half, enabling multi-page write mode, and metadata caching without sacrificing precious internal resources of the MCU.
|United States Of America||Issued Patent||9,734,118||08/15/2017||2014-039|
Pai H. Chou
Professor, Department of Electrical Engineering and Computer Science
Henry Samueli School of Engineering
University of California, Irvine