Stream-Based Memory Access Specialization For General Purpose Processors

Tech ID: 30500 / UC Case 2019-878-0

Summary

Researchers led by Zhengrong Wang and Tony Nowatzki from the Computer Science Department at UCLA have created a way to improve computer processing power, speed, and efficiency by optimizing how processors access memory.

Background

Computing processing power and speed have benefited from Moore’s Law, where transistors have become smaller so that more of them can fit on a computer chip. However, we have reached a point of diminishing returns where Moore’s Law is no longer practical and transistors can’t get smaller. Therefore, another approach must be employed to make computer processing more powerful and efficient. The instruction set architecture (ISA) is a set of basic instructions of how to access memory that a processors understands. Current ISA’s have instructions for single load/stores in memory and slow down processing performance by constantly having to fetch information from memory to process it with short inefficient requests. In addition, these are often difficult to prefetch (execute earlier than requested) due to control flow and indirect access. Improvements in ISA’s hold the potential of improving processing power, speed, and efficiency in the wake of diminishing hardware improvements.

Innovation

Researchers led by Zhengrong Wang and Tony Nowatzki from the Computer Science Department at UCLA have created a way to improve computer processing power, speed, and efficiency by optimizing how processors access memory. Typically processors are slowed down by having to constantly fetch information from memory, and it is also well-known that memory can take up to 50% of the power on the chip. This group’s invention attacks this by:

1. Creating a specialized ISA interface for “streams” of memory access that can vectorize (lengthen) memory access even when programs have control flow;
2. Decoupling this “stream” access from processing to remove the memory access delay;
and
3. Create an adaptive and efficient “stream” aware cache to enable smarter cache policies.

In a set of test studies, their design led to a 1.53x increase in speed and a 1.31x energy efficiency improvement across industry standard general-purpose processing workloads.

Applications

  • Computer processors
  • Graphic processors

Advantages

  • Easily implemented
  • Scalable
  • Increased processing speed
  • Increased processing power
  • Energy efficient

Patent Status

Patent Pending

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Inventors

  • Nowatzki, Anthony

Other Information

Keywords

Transistors, computer chips, computer processor, CPU, GPU, processors, computer, computing, semiconductors

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