CMOS-Compatible Doped-Multilayer-Graphene (DMG) Interconnects

Tech ID: 30070 / UC Case 2019-397-0

Brief Description

A method to implement high-conductivity nanometer-scale doped-multilayer-graphene (DMG) interconnects that are compatible with high-volume manufacturing of integrated circuits (ICs).

Background

Interconnects are a fundamental component of all integrated circuits because they connect billions of transistors as well as external signal and power pads, and determine the performance, switching energy, and reliability of the integrated circuit. Currently, the semiconductor industry uses Copper (Cu) as the primary interconnect metal in most integrated circuits and numerous microprocessors, but the resistivity of Copper increases significantly with dimensional scaling. The industry has been looking to replace Copper because it results in severe self-heating and degradation of current carrying capacity. Doped-multilayer-graphene (DMG) has the potential to solve these issues, but a major obstacle of this technology is its integrated circuit (or CMOS) process compatibility. 

Description

Researchers at the University of California, Santa Barbara have developed a method to implement high-conductivity nanometer-scale doped-multilayer-graphene (DMG) interconnects that are compatible with high-volume manufacturing of integrated circuits (ICs). This method can also be applied to the implementation of any multi-layer graphene (MLG) or DMG based structures on any substrate or strata, and it overcomes all previous obstacles preventing it from being a Copper replacement. This innovation presents higher electrical conductivity than Copper, faster speed and lower noise for signal propagation and clock distribution in chips, and significantly lower resistive losses in on-chip power distribution. Compared to all currently available options, the DMG interconnect is shown to be the most reliable interconnect material because it produces negligible electromigration and less than 4% conductivity degradation over 1000 hours at room temperature without any encapsulation or barrier layer needed for Copper. It also has a substantially higher current-carrying capacity, allowing for improved speed through thinner wires, reduced noise-coupling, and lower switching energy or power consumption in integrated circuits. Overall, this helps create faster, smaller, lighter, more flexible, more reliable, and more cost-effective integrated circuits. 

Advantages

  • High-volume IC manufacturing compatibility
  • Lower electrical resistivity w.r.t nanoscale Cu and other metals
  • Faster speed for signal propagation and clock distribution in chips
  • Substantially higher current-carrying capacity w.r.t Cu
  • Lower capacitive noise, switching energy or power consumption w.r.t  all conventional metals
  • More reliable than any other interconnect material

Applications

  • Semiconductors
  • Manufacturing of integrated circuits
  • Electronics manufacturing with low thermal-budget
  • Harsh environment (including space) electronics
  • Flexible electronics
  • IoT devices and electronics

Patent Status

Patent Pending

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Inventors

  • Banerjee, Kaustav
  • Jiang, Junkai

Other Information

Keywords

Electronics/Microelectronics, Interconnects, Integrated circuit, Graphene, indmicroelec

Categorized As