A time-domain mixed-signal VMM exploiting a modified configuration of 1 MOSFET-1 RRAM (1T-1R) array.
Mobile devices require a dedicated processor to enable computationally intensive applications such as neuromorphic computing and signal procession. Vector-by-matrix multiplication (VMM) is currently the most prominent operation in these applications. Increased efficiency in VMM blocks can enhance the performance of resource-intensive computations.
Researchers at the University of California, Santa Barbara have developed a time-domain mixed-signal VMM exploiting a modified configuration of 1 MOSFET-1 RRAM (1T-1R) array. In this approach, the inputs and outputs are encoded in digital domain as duration of the pulses while the weights are realized as programmable current sinks utilizing the modified 1T-1R blocks in the analog domain. This approach overcomes the energy inefficiency of the current approach; an effective compute precision of 8-bits is achievable, with an energy efficiency of ~25.5 TOps/J for VMM size=200.
electronics, vector-by-matrix multiplication, mobile devices, energy efficiency, compute precision, indmicroelec