UCLA researchers in the Department of Electrical & Computer Engineering have invented a novel circuit design that performs high speed and reliable data reading operations for resistive device-based memory applications.
Reading circuits perform crucial data reading operations in memory applications, which has a fast-growing multi-billion dollars global market with increasing consumer demands in speed and capacity. Split path reading circuit and current mirror reading circuits are two existing designs that implement low current sensing scheme, which require long current pulses that lead to slow reading speed, higher probability of disturbance and low reliability. These disadvantages need to be addressed in order to meet the increasing capacities of next generation memory applications.
A novel body voltage sensing based short pulse reading circuit was developed to improve upon the existing circuits. This new design includes a sensing circuit, a reference circuit and a sense amplifier. It features large sensing margin, high sensing speed and short current pulses applied on the resistive memory device. This circuit performs reliable and high-speed reading operations in resistive device based memory applications such as magnetic tunnel junction (MTJ) based magnetoresistive random access memory (MRAM) or large-size spin transfer torque random access memory (STT-RAM) in advanced technology nodes.
|United States Of America||Issued Patent||8,917,562||12/23/2014||2012-101|
spin transfer torque random access memory; magnetic tunnel junction; magnetoresistive random access memory; body voltage sensing; short pulse reading circuit; reading circuit