Piezoresistive accelerometers are traditionally fabricated by doping selected areas of wafer to achieve isolated pn-junctions. Often, two separate doping steps are employed to obtain both highly-doped conductors as well as lightly-doped piezoresistors. Once the piezoresistors and conductors have been defined, additional fabrication steps are required to etch the suspension system as well as the free-standing proof mass, which normally deflects in the out-of-plane direction.
Normally, four or more masks are used in the fabrication process making for complex and costly manufacturing. In addition, pn-junctions have high leakage currents at temperatures above 150OC, which is therefore the highest operational temperature of the sensors.
University researchers have developed a new method for fabricating piezoresistive accelerometers by utilizing silicon-on-insulator (SOI) wafers with a selected resistivity. The proposed fabrication process requires only one mask, thus reducing both the complexity and cost. Furthermore, the use of SOI wafers eliminates the need for a pn-junction normally required in piezoresistive sensors, allowing for less temperature-sensitive sensors.
This fabrication method can be employed for sensors used for acceleration measurements, including but not limited to the following applications: airbag deployment systems, car crash testing, munitions testing, and inertial measurements.
|United States Of America||Issued Patent||7,939,355||05/10/2011||2006-030|