Time-dependent dielectric breakdown (TDDB) is becoming a critical reliability issue in VLSI design, since the electric field across dielectrics barriers increases as technology scales downward. Moreover, dielectric reliability is aggravated when interconnect spacings vary due to misalignment between via and wire masks. Although dielectric reliability can be mitigated by a larger interconnect pitch, such a guardband leads to significant area overhead. (more...)

High-speed data streams can be sent without an accompanying clock signal, where the receiver generates a clock from an approximate frequency reference, and then phase-aligns to the transitions in the data stream with a phase-locked loop (PLL). This process is commonly known as clock and data recovery (CDR). CDR circuits operating at tens of gigabits per second pose difficult challenges with respect to speed, jitter, signal distribution, and power consumption. Half-rate 40-Gb/s CDR circuits have been implemented in bipolar technology but require large voltage supplies and draw high amounts of power. On the other hand, the recent integration of 10-Gb/s receivers in CMOS technology encourages further research on CMOS solutions for higher speeds, especially if it enables low-voltage, low-power realization.     (more...)

Media storage has advanced substantially, and is in ubiquitous use in industry and consumer products.  A major challenge for media storage is that electromagnetic radiation or DC magnetic fields can damage or destroy that memory.  By example, in consumer banking, each transaction lost due to magnetic media failure represents a substantial reduction of profit. To address this challenge, investigators at University of California have developed an electromagnetically robust memory storage.  This innovative, single material magnetoresistive universal memory is  insensitive to external electromagnetic perturbation.  The electromagnetism proof memory breakthrough comes from the writing procedures requiring two excitations. Because these memory writing approaches must be applied simultaneously, it cannot be damaged by uncoordinated occurrences near the writing embodiment. The information is read by the most simple electric measurement, namely 'ohmic resistance', thus the technical realization of embodiments for storing the data, editing the data and reading is enormously simple.  The electromagnetism proof memory can be used for either low-density or high-density data storage media such as credit cards, identification cards, access cards, or maps base for navigation. (more...)

Ever more efficient power generation, based on reliable, economically and environmentally acceptable methods, is a key to harnessing and providing the resources essential for improved life of mankind. One of the promising but yet-to-be-fully-utilized ways to convert wasted heat into useful electricity is to use thermoelectric (TE) power generators.  An enormous amount of waste heat could be converted into electrical energy if high-efficiency and highly-scalable TE power generators were available at the cost that is economically acceptable.   TE power generators have advantages of few moving parts, low maintenance, and long life. However, the current TE power generators have low efficiency and high cost, which significantly limits the market size.  Similarly, it is also difficult to envision ultra large scale implementation at economically acceptable cost based on current proposed approaches.  For scalability, TE power generators must overcome the insufficient availability of a large amount of semiconductors in bulk form (i.e., scaling limit) and limited performance due to the interplay between electronic and phonon systems in bulk semiconductors (i.e., performance limit). (more...)

Semiconductor metal oxides have been widely used as electrode materials for energy conversion and storage devices, due to their natural abundance, ease of synthesis, superior chemical stability, and relatively low cost. For example, metal oxides such as titanium dioxide (TiO2), zinc oxide (ZnO), tungsten trioxide (WO3) and hematite (-Fe2O3) have been extensively studied for photoelectrochemical (PEC) water splitting. While each metal oxide has their own limitations for specific applications, relatively poor electrical conductivity of metal oxide has been an intrinsic limitation for them to serve as electrode materials. For instance, it adversely affects the efficiency of charge separation and collection. (more...)

University of California researchers have developed a method for reducing electronic 1/f noise in graphene devices used for high speed applications and biological and chemical sensors.  Using a novel method of irradiating the channel regions of graphene devices with electron beams with proper irradiation dosage, the 1/f noise in a graphene device is suppressed.   (more...)

There is increasing commercial interest in small-scale, electricity generator applications that harvest energy from mechanical vibrations or linear motion.    To address this interests, researchers at UC Berkeley have developed a magnetic circuit architecture that has higher flux densities -- on the order of one Telsa -- across large functional air gaps. This circuit generates large induced voltages that can be easily rectified and stored to power wireless devices such as condition monitor sensors.    This innovative circuit can be used to efficiently transduce any linear kinetic energy but is particularly attractive for small-scale applications because the magnetic circuit generates large induced voltages for overall device length scales on the order of millimeters and centimeters. The source of the kinetic energy that is transduced can come from coupling to mechanical motion, mechanical vibration, current carrying conductors, fluid flows or pressure differences. (more...)

Clock networks in high-performance designs are extremely power hungry. Currently there is not a methodology to create resonant clock meshes that resonate at multiple frequencies. Dynamic frequency scaling is common technique to save power in both the clock network and in data-path logic on computer chips. While prior resonant clock networks can save power by recycling energy in the clock network, they do not save any power in the data-path logic. Prior resonant clocks only work at a single resonant frequency (more...)

This invention achieves a highly efficient defragmentation of spectrum in an optical telecommunications network (quasi-hitless). Using this technique, spectrum may be completely defragmented between connections in less than 400 ns, regardless of how the spectrum is allocated initially and with ho need for global synchronization. (more...)

This method uses a continuous learning process to achieve efficient and accurate communication in a dynamic environment and allow for more aggressive voltage scaling, achieving reduced power consumption. (more...)

This new method of transcoding can handle memory hardware errors, allowing for aggressive voltage scaling (lowering power use) without sacrificing the quality of streaming data services. (more...)

Microshell encapsulation processes have been developed for monolithic packaging of MEMS devices using polycrystalline silicon (poly-Si) as a porous encapsulation layer because it can be made permeable to HF when sufficiently thin [1] or electrochemically etched. This reduces release times and penetration of the sealing material. The temperature required to form poly-Si (> 600 oC) is too high for CMOS backend integration, however, precluding the use of this technology in monolithically integrated microsystems. Researchers at the University of California, Berkeley have developed a low-thermal-budget (CMOS-compatible) process for microshell encapsulation of microstructures or nanostructures. Inkjet-printing of nanoparticle ink is used to form a porous microshell through which sacrificial material can be selectively removed to release the microstructures or nanostructures. A second inkjet-printing process using finer nanoparticle ink is used to seal the microshell. The mechanical strength of a printed microshell (which can be >1 micron thick) is sufficient for encapsulating regions greater than 1 mm in length. (more...)

With the development of wireless sensors networks, there is an urgent need for compact power sources. The challenge to developing planar devices to meet these needs is the integration of the electrodes’ high surface area material necessary to ensure a high capacitance. with acceptable performances.  To meet this challenge, investigators at University of California at Berkeley have developed polymer derived porous carbon material for on-chip energy storage devices  The high porosity of the fabricated material leads to a high specific capacitance and hence, high energy density.  The process is highly compatible with planar micro-/nanotechnology. The material is stable at high temperature (< 900°C), and can be used to fabricate on-chip storage devices such as microsupercapacitors able to operate at high temperature. (more...)

Rapid prototyping materials that have durable characteristics are extremely expensive. Where traditional 3-D printing technology is reserved for small-scale prototyping in a limited number of fields at an exorbitant cost, 3-D Printed Structural Translucent Concrete introduces the notion that this same technology could be employed to fabricate structural building components at very little cost for a wide range and scales of applications.      Researchers at the University of California, Berkeley has developed a 3-D Printable Structural Translucent Concrete that uses traditional 3-D printing technology to produce building components with compressive and tensile strength up to 70% greater than standard concrete. This process introduces a new level of control over how modular building blocks are considered and derived. This material allows for high degrees of variability and specificity to be imbedded in building components that are structurally strong, water resistant, and inexpensive. The cost of production is over 90% less expensive than standard rapid prototyping processes and it shares similar strengths to concrete with thin-shell capabilities not unlike fiberglass. The material has the potential to entirely redefine how we consider rapid prototyping, and when related to architecture, the degree to which buildings can be responsive and unique to their climate, client and context. (more...)

Methods that define the operation of parallel computation for multiple-computer interaction and cloud computing. (more...)

If electricity energy scavenging from vibration became commercially practical, then it would enable large opportunities for powering wireless electronics in many markets -- including, manufacturing, medical care, energy efficiency and personal electronics. However, vibration energy scavengers have been cost-prohibitive and too application-specific. The impediment of application-dependence is due to the fact that vibration energy scavengers only produce useful amounts of power when they are driven at their resonance frequency. Moving even several tenths of a Hz away from resonance frequency has a detrimental impact on power output. Solving this resonance issue is challenging because it's impractical to measure the vibration spectrum at every target location and then customize every vibration scavenger for each location. Furthermore, the vibration frequency at each location can't be expected to remain constant.   To solve this problem, researchers at UC Berkeley have developed a beam-mass system that autonomously adapts its resonance frequency to the ambient vibration frequency, thereby achieving maximum power output in arbitrary vibration environments. The same approach can also be used to autonomously minimize (i.e. de-tune or damp) the vibration amplitude in response to the external input vibration. Whether tuning or de-tuning, this novel system doesn't require any human intervention, control algorithms, or external energy sources (other than the ambient vibration).  (more...)

Flash, SSD, and Storage Class (SCM) technologies stand to replace magnetic disk technology as the mainstay for high end applications. However, magnetic disk technology will continue to play an important role in large storage systems, due to the sheer amount of data to be stored, the attractive cost-to-capacity ratios of disks, and the high steaming throughput. Although, disk drives offer decent performance (especially when accessing large blocks of data) and very low cost per GB, they are mechanic-electrical devices with moving parts, which subjects them to relatively high annual failure rates. This failure rate contributes to a heightened sensitivity in assessing liability associated with the loss of data; resulting in some companies using triplication of disk storage devices to protect data (e.g., internet searches). While replication offers operational advantages, the storage overhead and its associated costs in hardware, maintenance, and energy is too large.  (more...)

A novel material applicable to holographic data storage. This technology features low fabrication costs and largely scalable production. (more...)

Researchers at UC Berkeley have developed methods and devices for enhancing overall throughput in wireless communication by exploiting the information about the channel gains of the various receiving nodes beyond prediction. This method will provide significant throughput increase even when the delayed channel information is not useful for prediction. (more...)

Multi-Copy Cache (MC2) is a new cache architecture that enables significant reduction in energy consumption through aggressive voltage scaling, while maintaining high reliability of the cache. This architecture results in a highly energy efficient cache with minimal impact on the area and the access timing of the cache. (more...)

UC San Diego researchers have come up with devices and methods to improve efficiency for machine-human interfaces, and especially for computer interfaces. By providing an alternative to the standard-use, keyboard-style interface (yet still capable of working with standard-style keyboards in a modified configuration), both an increase in efficiency and a decrease in injury can result. The invention is also adaptable to individuals with limited mobility, to enable their use of standard-style keyboard configurations with minor adjustments. In preliminary user studies, an individual with quadriplegia was able to begin touch-typing within a week, and reached 48 words per minute in an on-line typing test in just a few months. (more...)

In its simplest form this invention consists of a novel software-only approach to malicious code detection and repair in real time. However by including a minute extra component (< 0.001% total transistor count) to a standard commercial processor this process can enable fully automatic repair of malicious code injections. (more...)

One of the most serious disadvantages of fully adaptive wormhole routers is its performance degradation due to the routing decision time. The key to overcome this shortcoming is the use of different clocks in a head flit and body flits because the body flits can be forwarded immediately and the FIFO operates faster than route decision logic in an adaptive router. (more...)

As the amount of processors on a VLSI chip increases, it is critical to develop a new design strategy that is scalable. The idea of Wireless Network-on-Chip (WNoC) has a great potential to address this demand for scalability of the future VLSI chip design. (more...)

Graphene was first isolated about 4 years ago, and has since received considerable buzz for potential use in electronics. Sheets of graphene, or nanofabric, are similar to unrolled nanotubes. Electrons can travel over 100 times faster in graphene than in silicon, making these sheets suitable for next generation, fast-switching transistors. While theoretical studies of graphene promote excitement, real prototypes have been far less forthcoming. Tremendous efforts to develop a scalable production method have been made, however bulk processing has not been achieved. Current production methods are time and labor intensive, and produce little yield. Furthermore when small fragments are fabricated, they are not large enough for computer wafer design. These limitations have, thus far, limited the commercialization and integration of graphene into electronics. (more...)

This integrated circuit (IC) provides FIR digital filters and correlators that can be configured to meet any desired specification. A novel circuit design allows the user to program not only the tap-coefficient values and the impulse response length, but also to configure the manner in which the ICs hardware resources are allocated to the various taps. Thus the user of the IC is provided the ability to trade off tap-coefficient precision with the overall impulse response length, thereby achieving maximum utilization of the ICs hardware resources. Prototype chip specifications are: Max. FIR order 32 I/O word length 16-bit Technology 1.2m CMOS Coef. word length 16-bit Core Area 4.2 x 2.8 mm2 Max. data rate 175MHz Die size (with pads) 5.9 x 3.4 mm2 Num. of pins 84This chip represents a significant improvement in area efficiency (thus cost) over other competitive chips while still being capable of processing data generated with todays high speed A/D converters. Applications, in addition to filters and correlators, include Hilbert transforms, signal conditioning, and channel equalization for HDTV, satellite and other wireless communications systems, disk drives, radar and sonar, spectrum analysis, digital test equipment, etc. The chip is also ideal for rapid system prototyping. Due to its high area efficiency, this chip provides an alternative to custom FIR filter ASICs, with advantages that are similar to those of FPGAs (i.e., is a standard reconfigurable circuit that readily allows for design changes). Since the core of the chip is generated by a silicon compiler, it also can be used as a block embedded in a larger system chip where the size (prototype=32 tap max.) and wordlength (prototype=16 bit) can be revised to meet arbitrary requirements. The current prototype can easily be re-optimized for operation at higher or lower speed and filter design software is available to select optumim filter coeffients and hardware allocations. (more...)

Typical printing pins are susceptible to variations in pin surface, print surface, printing speed, and environmental conditions such as humidity. Precise control over these conditions, along with pre-printing, can reduce the degree of inconsistency in printed spot size and volume. However, the precise control can require a skilled user to supervise the process. Furthermore, the rate of printing is slowed down, decreasing throughput and efficiency of the printing process. Printed spot size can become irregular, requiring a lower density of printed spots. Pre-printing to a dummy surface is standard protocol to remove excess material from the exterior of the printing pins prior to starting the intended printing. However, pre-printing wastes material, and causes a delay which lowers printing throughput and efficiency. (more...)

UC San Diego inventors have invented a method for multiplying binary digits in a rapid and memory-efficient manner. It does not use the traditional positional-value system. This method has the additional benefit of using small computers with less memory and can generate bounds (upper and lower) on the significant digits in advance of having the complete multiplication result. (more...)

Search engines have become a successful Internet-based business with rapid growth in revenues. UC San Diego inventors have created a configurable search technique that allows those with the expertise in a specific domain to easily define their own domain-specific, relation-based search engines that returns the results of a search with a hierarchical dependency. This invention can benefit search engine businesses by expanding their customer base and increasing the number of hits per search. Businesses that use search engines as part of the shopping experience for their website can enhance the customer experience through a more specific and tailored searching process. (more...)

UC San Diego inventors at the San Diego Supercomputer Center have invented a new, more powerful method of managing data. This technology removes the need for a data intermediary, required of the current generation of so-called federated databases. By creating on-the-fly a knowledge base from disparate data systems, the end user can have more power to add and remove data sources. A working prototype is ready for demonstration. (more...)

Currently, optical monitoring is all that is available to monitor undercut etch rates.  This method has limitations, as it is not possible to fully measure the remaining material to be etched.  Also, this approached makes automation difficult. To meet this challenge, investigators and University of California at Berkeley have developed a method where undercut etch rates can be characterized using purely electrical means.   Beams of different widths are undercut by an etchant.  Conducting beams are fully undercut when all the material beneath is removed.  The fully undercut beams are made to collapse into contact with another conducting "landing" electrode by way of surface tension.  By observing the widths of beams which are collapsed, undercut etch rates are measured.  By alternating the semiconductor doping type of the beam and the landing electrode, diodes may be formed, making sensing of etch rates possible in an addressed array. (more...)

Innovators at the California Institute for Telecommunications and Information Technology (Calit2) unveiled recently a state-of-the-art, touch-screen computer work-table. Included in this technology package is a complete design specification for the table construction, equipment list, board designs, and control software. Also included are two novel breakthroughs in illumination control and touch-surface design to yield a much more user friendly, robust, and scalable computational platform. Sample tables are available on a cost-reimbursement basis. (more...)

This disk drive load/unload simulator allows the calculation of the air bearing spacing between a slider and a disk during start/stop when the tip of the suspension moves up or down on the load/unload ramp. (more...)

In order to overcome fundamental energy efficiency limits of CMOS technology, micro-electro-mechanical (MEM) relay technologies are now being investigated for ultra-low-power digital integrated circuit (IC) applications. High relay endurance (exceeding 10^14 ON/OFF switching cycles) is required for relay-based ICs to be viable, and has been a major challenge due to stiction and wear. Researchers at UC Berkeley have developed an efficient way to reduce contacts aging, stiction, and oxidation. The researchers have shown that contacts can be made to be very reliable with very low resistance. To date, a contact resistance of 85.2 kohms has been measured at room temperature and suggests the possible use of these contacts for relay-based integrated circuits, which typically requires contact resistances less than 100 kohms. Further work will include coating optimization, surface roughness analysis, dynamic measurements for contact aging evaluation, thermal analysis, extraction of the effective contact area, and advanced current transport modeling. (more...)

The concept of a capacitor-less DRAM cell was proposed to overcome scaling challenges for conventional 1-transistor/1-capacitor DRAM cells.  The silicon-on-insulator (SOI) floating body cell (FBC) is a very compact capacitorless DRAM cell design, but it requires more expensive SOI substrates and is difficult to scale to very short channel lengths.  The double-gate DRAM (DG-DRAM) cell was proposed as a more scalable design, and was recently demonstrated at 70nm gate length; however, it still has a relatively large cell size (8F2), is susceptible to disturbance within a memory array, and is not easily integrated into a conventional memory process flow. To overcome these challenges, researchers at UC Berkeley have developed a new 4F2 double-gate vertical channel (DGVC) design that can be fabricated on a bulk-Si wafer using a conventional process flow.  Retention and disturbance immunity characteristics of a DGVC cell are expected to be adequate for stand-alone memory applications, at the 22nm technology node (0.00194 ìm2 cell size).  The design allows for longer channel lengths as compared to a planar channel design, so it is promising for 4F2 DRAM scaling to sub-22nm technology nodes. (more...)

Photochromic fulgides are capable of reversible light-induced coloration. These organic compounds exhibit several important physical properties such as thermal stability of both colorless and colored forms, high photoreaction efficiency, high fatigue resistance to repeated coloration-bleaching cycles and light power. Photochromic fulgides are therefore promising candidates for many technological applications including use in recording media, particularly in erasable optical memory devices.In order to be useful as 3D optical memory device materials the colored form of the photochromic materials will fluoresce when illuminated with light. Heteroclic photochromic fulgides have been synthesized but they do not fluoresce in either their colored or colorless forms. (more...)

In the past, several modeling abstraction levels were proposed to improve simulation speed and modeling time over detailed cycle accurate (CA) models. The Pin Accurate Bus Cycle Accurate (PA-BCA) modeling abstraction maintained cycle accuracy at every cycle boundary for communication in a system, while capturing all the pins at every component interface. These models were faster to simulate and model than CA models. The Transaction based BCA (T-BCA) modeling abstraction used the concept of transactions from the TLM domain to speed up modeling and simulation time when compared to PA-BCA models. However, both PA-BCA and T-BCA models are still slow to simulate and time consuming to model, for system exploration. (more...)

SPI is one of the most popular bus interfaces between a microcontroller and a peripheral device. However, system designers often overlook a bottleneck, which uses SPI inefficiently when transferring between two slave devices. Our technique eliminates this bottleneck with very simple hardware, and this should be of interest to manufacturers of microcontrollers. Peripheral devices would not require any modifications and can be used just as before. (more...)

The great commercial success of DRAM can be attributed in large part to the continued miniaturization of the memory cell unit that in turn drives increased storage density and decreased costs. To further improve DRAM memory density, researchers at the University of California, Berkeley have developed a new technology that features a capacitorless DRAM (CDRAM) cell on Silicon-On-Insulator (SOI) substrate. The one transistor, capacitorless design of this innovative memory cell makes it very attractive for ultra high-density memory applications. To eliminate the need for a capacitor, the CDRAM device employs an operational concept similar to dynamic threshold. Previously proposed dynamic threshold cells, in which the charge is stored in a potential well formed by critically adjusting implantation, are sensitive to process conditions and are difficult to manufacture. In contrast, CDRAM, in which the charge is stored in the thin silicon film to modulate the threshold voltage, uses a simple fabrication process that exploits SOI technology. Furthermore, the amount of charge read in the CDRAM cell can easily exceed the amount of charge read in an ordinary DRAM cell (~100fC). Additionally, the CDRAM process is compatible with the general purpose SOI CMOS process and with the 10-mask, fully complementary SOI BiCMOS process?this makes CDRAM a solid candidate for future SOI VLSI applications. (more...)

In order to improve energy efficiency and correspondingly lower energy use and cost, there is growing interest in improving the intelligence of electricity usage across the grid – including down to the level of common electronic devices that use single wire or two-wire “zip-cord”. To enable this ubiquitous level of intelligent electricity usage, AC current sensors will be needed that are inexpensive to make, simple to install, and easy to maintain. However AC current sensors with these attributes have not been developed. To address this challenge, researchers at UC Berkeley have developed an integrated sensor device that can measure AC electric current in a wire or wires that are operating in proximity to the device without requiring (1) electrical contact with, or physical encirclement of the conductors, or (2) precise spatial orientation or precise physical mounting/placement of the sensor device relative to the conductors. These attributes make the sensor inexpensive to manufacture, easy to install and simple to maintain. (more...)

In developing regions, computers are often shared among large groups of users, rather than the traditional one-to-one model of usage. This has particularly been observed in the classroom setting, where computers are becoming more common. In response, Single Display Groupware (SDG) has been shown to have great utility in these regions. SDG amortizes the cost of the hardware over all of the users, decreasing the per-user cost. It also allows the hardware purchases to scale more easily as new users are introduced. One system that has utilized this model is Microsoft's Multimouse. Multimouse is an SDG software solution focused on using multiple USB mice to engage groups of students using educational applications. However, as is common with most SDG development interfaces, these applications must be custom-built to utilize the Multimouse technology. Legacy applications are limited to using multiple inputs in a naive way: all mouse actions are assumed to be from the primary mouse. This limits the adoption of Multimouse and other SDG software, as few compatible applications have been developed. There has been a dearth of work on utilizing SDG with legacy educational software. Most of the development in this area deals with integrating with the existing windowing system, not how to correctly operate legacy applications in a SDG environment. Researchers at the University of California, Berkeley have developed algorithms and software which allowing for functional and intuitive use of legacy applications in SDG environments. This innovation provides multi-user interface to legacy software. The UCB research effort is initially focused on education, providing an intuitive user interface for point-and-click educational applications. Because collaboration has been shown to be an important factor in the effectiveness of SDG educational software Metamouse is designed to enforce collaborative behavior among users. See Paper: Metamouse (more...)

Testing and characterization of electrochemical energy cells such as microbatteries is critical in the development of battery-powered microelectronics. Discharge and cycle testing of microbatteries may require days or weeks of continuous monitoring, and often must be conducted in a closed environment such as a glovebox. Galvanostatic studies are at present the preferred method for characterizing the performance of energy cells, but characterization of microbattery performance requires galvanostats with microamp or better resolution. Commercially available galvanostats are capable of testing multiple cells in parallel, but instruments with the required microamp resolution are bulky, cost at least $1000 per channel, and must be hard-wired to each test cell. Higher resolution instruments cost from $5000 to $10,000 per channel?prohibitively expensive for many testing facilities. Commercial galvanostats are also useful for testing and characterizing fuel cells and for electrodeposition studies and corrosion measurement, and while resolution is not a cost driver, instruments for these applications are also large and expensive, and have limited scalability. Researchers at the University of California, Berkeley have developed a wireless galvanostat device with nanoamp resolution. The device supplies a programmable constant current anywhere from 1 nanoamp to 15 milliamps. The device is preferable to conventional galvanostats for applications such as battery and capacitor development, and for corrosion or electrodeposition studies, where testing in a usage environment and cost per channel are critical factors. The unit is small, battery powered, and transmits all data wirelessly to a computer, allowing for quick and easy placement in an inert atmosphere, such as a glove box or deposition chamber. Fabrication cost of Berkeley?s wireless galvanostat is less than $100 per channel, even without factoring in economies of scale. (more...)

Advancements in game theory and auction analysis have led to the development of various mechanisms to facilitate exchanging goods, services, and other things of value. For example, the well-known Vickrey-Clarke-Groves (VCG) auctions have beenproposed for various exchange-type applications. Unfortunately, implementations of VCG auctions are often undesirably computationally complex and may require periodic infusions of capital for sustained operability. Such auctions are considered not budget balanced if additional infusions of capital are required. Furthermore, certain applications may require that certain desirable auction properties, such as efficiency, be compromised. An efficient auction may be an auction that maximizes the aggregate benefit to participants, i.e., the social welfare,when participants act to benefit themselves, i.e., they bid selfishly. In addition, conventional auction systems and methods often lack capabilities required for various real-world applications, especially applications involving exchange of combinations of items or things, such as portions of sub-links comprising a communication link. To solve this problem, researchers at UC Berkeley have developed a double-sided exchange wherein both buyers and sellers provide bids for matching via the exchange. A first interface receives buy bids from buyers and a second interface receives sell bids from sellers. A controller matches the sell bids with the buy bids, yielding matched buy bids and matched sell bids in response thereto so that allocations of the matched buy bids and the matched sell bids maximize a surplus of the exchange. An allocation that substantially maximizes an auctioneer's profit and/or announces payments based on sell bids is provided. The announced allocations and prices can be shown to be a substantially competitive equilibrium in some applications.    (more...)

The semiconductor industry has not solved the challenge of shrinking DRAM past the 1-4 gigabit generation without changes to cell design. Therefore developing a CMOS-compatible DRAM that can be scaled beyond the conventional 1T/1C DRAM cell would be a significant advancement. To address this opportunity, researchers at the University of California at Berkeley have developed a capacitorless, double-gate DRAM cell (DG-DRAM) that simultaneously reduces process complexity and cell size below 100 nm. In addition to achieving retention times of several hundred milliseconds at 85 C, this DG-DRAM also has a large body coefficient and good immunity against off-state leakage. Moreover, dopant fluctuations can be avoided -- which can be particularly important in high density arrays using small-geometry cells. (more...)

Rapidly tunable, ultra-compact, room temperature infrared source (more...)

Innovations that enable optical network providers can now offer service level agreements assuring both continuous quality and guaranteed levels of protection from connectivity interruptions in mesh net operations (more...)

A new switching device made of half-metals that possess spin polarization of 100% at the Fermi energy. (more...)

Ultra-low Latency Multi-Protocol Optical Routers (more...)

Reconfigurable Multi-Channel All-Optical Regenerators (more...)

Organic molecules that absorb two or more photons simultaneously have wide applications in a variety of technologies involving such subjects as optical data storage, 3-D microfabrication techniques, frequency upconverting lasing, optical power limiting, photodynamic therapy, initiators of polymerization reactions, and multi-photon fluorescence microscopy for biological imaging.   (more...)

In the past in the semiconductor industry, circuit designers and process engineers worked together at the same company. However, companies are now specializing in either design or processing. As a result, systems are being built from pre-designed, or virtual components (VCs). Reuse of VCs saves time and money by implementing proven functions into new designs and, when licensed legitimately, is beneficial to both the licensee and the designer. However, billions of dollars are lost each year by the unauthorized use of VCs. As a result, VC designers need a way to protect and verify the use of their designs. (more...)

There are many instances when it is desirable to remove an underlying operating frequency from an output signal. When the frequency range is somewhat known, this removal is relatively straightforward using a stagger-tuned notch filter. Stagger-tuned notch filters, however, introduce considerable phase lag and when the frequencies are grossly unknown, unstable, or both, so much phase lag is introduced as to make these filters unsuitable for a very important application: closed-loop control. A very narrow adaptive notch filter can be used to greatly reduce the phase lag, however, this introduces a new difficulty. A very narrow notch filter must be an infinite impulse response (IIR) filter, hence it must be recursive. This in turn makes the adaptive tracking of the notch frequency of the filter unstable, again making the situation unsuitable for closed-loop control. (more...)

Quantum dots possess unique properties that could potentially revolutionize existing optical and electronic technologies as well as open up new technologies. Conventional quantum dot fabrication techniques, however, have several drawbacks, such as large recombination velocities and surface depletion, that arise from having the surface exposed while patterning the substrate before or after growth. Researchers at the University of California have developed a quantum dot fabrication process that does not require any processing steps either before or after growth and so avoids typical problems such as surfaces, dislocations, and surface states. This process produces uniformly sized quantum dots in single or multiple layers out of any semiconductor, metal, or oxide material system that allows consecutive epitaxy and has lattice mismatch. (more...)