Vsat Structure For Nonvolatile Memory Device
Tech ID: 22317 / UC Case 2009-453-0
Summary
- Provided are a semiconductor device and a method of fabricating the same. At least one mold structure defining at least one first opening is formed on a substrate, wherein the mold structure comprises first mold patterns and second mold patterns that are sequentially and alternatingly stacked. Thereafter, side surfaces of the first mold patterns are selectively etched to form undercut regions between the second mold patterns. Then, a semiconductor layer is formed to cover a surface of the mold structure where the undercut regions are formed, and gate patterns are formed, which fill respective undercut regions where the semiconductor layer is formed.
Background
Innovation
Applications
Advantages
State Of Development
Patent Status
| Country | Type | Number | Dated | Case |
| United States Of America | Issued Patent | 8,164,134 | 04/24/2012 | 2009-453 |
| United States Of America | Published Application | 20120181593 | 07/19/2012 | 2009-453 |
Inventors
- Wang, Kang-Lung L.
Contact
UCLA Office of Intellectual Property & Industry Sponsored Research / ncd@research.ucla.edu / tel: View Phone Number. Please reference Tech ID #22317.
ADDITIONAL TECHNOLOGIES BY THESE INVENTORS
- Relaxed SiGe Films By Surfactant Mediation
- Horizontal Current Bipolar Transistor
- Vertical Gate-Depleted Single Electron Transistors
- High Aspect Ratio FinFET For High-Density CMOS/BiCMOS Applications
- High Aspect Ratio FinFET
- Novel Nanomaterial-based Thermo-Photovoltaic Cells
- Horizontal Current Bulk Bipolar Transistor
- Ordered And Self-Assembled MnXGe1-X Nanostructures By MBE
- Graphene Flash Memory Device
- Vertical-Stacked-Array-Transistor (VSAT) for Nonvolatile Memory Devices
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